The present invention relates to semiconductor integrated circuits including sequential circuits (circuits having a data storing function, in which the fan-out is determined by the present input and the stored data), more particularly to semiconductor integrated circuits, for example, microcomputers in which the logical operation timing is controlled by the clock synchronizing operation for flip-flop circuits arranged in information transfer paths.
It is possible to easily prevent malfunctions and to process data by arranging registers in information transfer paths between an arithmetic/logic units, multiplexer, shifter, decoder, and selector included in the execution section of a logic LSI such as a microcomputer and by synchronizing the registers with a clock signal. Each register comprises synchronous-type sequential circuits such as flip-flop circuits. The performance of such a logic LSI is determined by a clock signal frequency for controlling the synchronizing operation of the registers arranged in information transfer paths. That is, when data is outputted from a register synchronously with the change of the clock signal, logical operation or the like is applied to the data. The clock signal frequency is determined so that the next-stage register can receive the data synchronously with the change of the clock signal when the operation result reaches the next-stage register. This type of microcomputer is described in "Nikkei Electronics (the Jul. 13, 1987, issue, pp. 124-138" published by Nikkei-McGraw-Hill, Inc.).